China's Answer to the Node Gap Is Interconnect, Not Lithography

Walk the chip floor at the World Artificial Intelligence Conference in Shanghai this week and the repetition becomes the story. Muxi, Moore Threads, Enflame, Biren, MetaX — each unveiled a supernode product. Not a faster chip. A rack.

That is a strategic answer to a physical constraint, and it is worth taking seriously on its own terms rather than as a curiosity.

The constraint

China's foundries are effectively capped near 14 nanometers for volume production of this class of silicon. Extreme ultraviolet lithography is not for sale, and no amount of capital fixes that in the near term while TSMC pushes 2nm into production.

If the unit of competition is the individual accelerator, this is a losing position and it stays losing. A 14nm die will not match a 2nm die on transistor density, performance per watt, or cost per FLOP. That comparison has no favorable ending.

So the domestic ecosystem has, more or less in unison, decided to change the unit of competition. The product is no longer the chip. The product is the machine you assemble out of chips — and the thing that determines how good that machine is turns out to be interconnect topology, not process node.

The numbers on the floor

Moore Threads publicly unveiled the MTT C256 for the first time, achieving full interconnectivity among 256 cards within a single scale-up network layer. The significance is the layer, not the count. The industry's common ceiling for single-layer scale-up has been 64 cards; past that you add network hierarchy, and hierarchy costs you latency and effective bandwidth exactly where large-model training is most sensitive.

MetaX debuted its S-series supernode servers alongside next-generation X-series chips. Its S600 delivers full switching and full interconnect within a single 64-card rack, scaling horizontally to tens of thousands and, the company says, up to 100,000 accelerator cards. MetaX's VP of R&D framed the 64-card rack as a market demand inflection point — a revealing thing to say out loud, because it defines the rack, not the die, as the thing customers are actually purchasing.

The most aggressive claim came from Dongfang Suanxin, which introduced its DF1000 at a launch event just ahead of the conference and showed a 512-card cluster on the floor.

The DF1000 is built on a 14nm process and claims 520 teraflops of BF16, 6.4 TB/s of memory bandwidth, and 900 GB/s of scale-up bandwidth. The company's stated approach is a software-defined 3D near-memory architecture — using stacking and proximity to break the bandwidth and power walls that the mature node would otherwise impose.

The detail that deserves the most attention is that the DF1000 is HBM-free.

Why HBM-free is the real move

High-bandwidth memory is the quietest and most effective chokepoint in the entire export-control regime. You can design a competitive accelerator without EUV if you are willing to accept a larger, hotter, less efficient die. You cannot easily feed that accelerator without HBM, and HBM supply is concentrated, controlled, and constrained.

An architecture that hits 6.4 TB/s without HBM — if the number holds — routes around the binding constraint rather than absorbing it. That is a fundamentally different posture from trying to buy or smuggle the restricted part. It is design-level substitution, and it is the kind of adaptation that export controls tend to provoke rather than prevent.

Dongfang Suanxin's roadmap is correspondingly blunt: the DF1000 ships by year-end 2026, the DF2000 arrives in Q4 2026 targeting NVIDIA's H200, and the DF3000 lands in late 2027 targeting the B300. The company reached an RMB 12.3 billion valuation after an April 2026 Series A+ backed by the National AI Industry Investment Fund, Zhangjiang Hi-Tech Park, Hillhouse Capital, and venture arms tied to Meituan, Xiaomi, JD.com, and Didi.

That investor list is not a normal venture syndicate. It is state capital and platform capital arriving together, which tells you the domestic silicon program is being treated as infrastructure rather than as a bet.

The appropriate skepticism

None of these figures are independently verified. They are vendor claims made at a trade show by companies raising money and competing for a domestic procurement pipeline that Beijing has already tilted toward them by mandating domestic chips in state data centers.

"520 teraflops BF16" is a peak number, and peak numbers have a long history of poor correlation with delivered training throughput. Full interconnect among 256 cards is meaningful only if the software stack can actually exploit it — and the software stack, not the silicon, has always been the deeper moat. CUDA is fifteen years of accumulated compiler work, kernel libraries, and developer habit. Nobody unveils that at a conference.

The two strategic chip-to-model alliances launched at WAIC are an acknowledgment of exactly this gap. Hardware without a model ecosystem trained against it is inventory.

It is also worth being precise about what is genuinely new. Huawei's Atlas 950 SuperPoD, with 8,192 Ascend cards, and the associated SuperCluster scaling past 500,000 NPUs, were announced back in September 2025 at Huawei Connect. That was the ceiling. What WAIC 2026 showed is the ecosystem filling in underneath it — a half-dozen independent vendors converging on the same architectural answer at the same moment.

What it adds up to

Convergence is the signal. When five or six competitors independently arrive at the same product shape in the same quarter, they are not copying each other's marketing. They are responding to the same binding constraint with the same available degree of freedom.

Export controls set out to cap Chinese AI compute by capping Chinese transistor density. The response has been to accept the transistor gap as permanent and attack the problem one level up the stack — more silicon, welded together more tightly, fed by memory architectures designed around the restricted part.

Whether that closes the gap is an open question, and the honest answer for now is that nobody outside these companies has the data to say.

But the strategy is legible, it is funded, and it is no longer a single national champion pursuing it. It's an industry.